Prof. Brian Evans

phone: (512)232-1457
e-mail: bevans@ece.utexas.edu
personal homepage: http://www.ece.utexas.edu/~bevans/

Brian L. Evans is an Associate Professor in the Department of Electrical and Computer Engineering. He acquired his B.S.E.E.C.S. (1987) degree from the Rose-Hulman Institute of Technology, and his M.S.E.E. (1988) and Ph.D.E.E. (1993) degrees from the Georgia Institute of Technology.

He focuses his research and teaching efforts on embedded real-time signal and image processing systems. Dr. Evans has published over 100 refereed conference and journal papers in these fields. His current research interests include the design and real-time implementation of ADSL/VDSL transceivers, wireless bridges, desktop printer pipelines, and 3-D sonar imaging systems. From 1993 to 1996, he was a post-doctoral researcher in design automation for embedded systems in the Ptolemy project at UC Berkeley. His contributions to Ptolemy Classic were commercialized by several companies. He is the primary architect and developer of the Signals and Systems Pack for Mathematica, first commercially released in 1995. In Fall 1996, he joined the faculty at UT Austin. His research group has authored a freely distributable ADSL equalizer toolbox in Matlab that is widely used by industry.

He is a Senior Member of the IEEE, and a recipient of a 1997 NSF CAREER Award.

Research Interests

Maximizing Bit Rate in DSL Modems for High-Speed Internet Access
Asymmetric Digital Subscriber Line (ADSL) modems are in widespread use in homes and small businesses for high-speed access to the Internet. ADSL modems rely on discrete multitone modulation, which divides a broadband channel into many narrowband subchannels and modulates encoded signals onto the narrowband subchannels by using the fast Fourier transform (FFT). In ADSL receiver, the equalizer has two tasks to perform:

time-domain equalization (TEQ) to shorten the effective duration of the channel impulse response, and
frequency-domain equalization (FEQ) to compensate for magnitude and phase distortion.

The equalizer design is the key to maximizing bit rate in an ADSL modem. The Embedded Signal Processing Laboratory at UT Austin, which is led by Prof. Brian L. Evans, was the first group to design a TEQ to maximize bit rate. His group has extended this work to maximize the bit rate of the following equalizer structures, which appear in order of increasing maximized bit rates:

single finite impulse response filter TEQ plus FFT plus one-tap FEQ

two parallel TEQs plus two FFTs plus one-tap FEQ

time domain filter bank plus Goertzel FFT filter bank plus one-tap FEQ

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